
| • | Completely integrated development environment including a graphical designer, test tools, a code generator, and a documentation facility |
| • | Graphical state machine design based on the Unified Modeling Language (UML) state machine subset |
| • | Formal verification of the design model to find unwanted properties in the design, like dead-ends or unreachable states etc. |
| • | Test and validation tools to ensure at an early stage of design that the application behaves as expected, even before the hardware exists |
| • | Automatic code generation providing very compact C/C++ code, 100% compliant with the design |
| • | Automatic documentation generation with comprehensive information |
| • | Tightly integrated with IAR Embedded Workbench, ready-made project examples for various microcontrollers and evaluation boards |